An example of a prior art reference showing a single electron memory using polycrystalline silicon disclosed on pp. 541 to 544 by K. Yano et al., IEEE International Electron Devices Meeting, 1993. According to the technique disclosed, the channels for current paths and the memory regions for capturing electrons are simultaneously formed from a polycrystalline silicon thin film. Information is stored by making use of the fact that the threshold voltage changes when electrons are captured in the memory regions. According to this technique, 1 bit is stored corresponding to the storage of one electron. By utilizing the crystal grain of the polycrystalline silicon, a small structure can be realized to operate at room temperature.
In the prior art, a non-volatile memory device such as a flash EEPROM has been realized by using MOSFETs having floating gates and control gates. Information is stored and read out by making use of the fact that the threshold voltage of the MOSFETs is changed by storing carriers in the floating gates. The floating gates are usually made of polycrystalline silicon. By using the MOSFETs with floating gates, the information of 1 bit can be stored for a long time by a single transistor. An example of a prior art structure embodying the memory cell structure of the flash EEPROM is disclosed on pp. 151 to 157 of Nikkei Electronics No. 444, 1988.
Another example of prior art relating to deposition of thin polycrystalline silicon on various insulator films is disclosed by T. Hashimoto et al., Conference on Solid State Devices and Materials, pp 97-100 (1989). Hashimoto et al. disclose that obtaining continuous thin silicon film using LPCVD depositions on CVD SiO.sub.2 and on Si.sub.3 N.sub.4 are better than on thermal SiO.sub.2.